Information Technology

Data Processing: Design And Analysis Of Circuit Or Semiconductor Mask

Pla, Pld, Fpga Or Mcm

No:7363608

Accelerating pcb development and debug in advance of platform asic prototype samples

No:6480993

Accurate layout modeling for centerline-based detail routing

No:7000210

Adaptive adjustment of constraints during pld placement processing

No:5349248

Adaptive programming method for antifuse technology

No:5498979

Adaptive programming method for antifuse technology

No:7032203

Algorithm to increase logic input width by cascading product terms

No:7424698

Allocation of combined or separate data and control planes

No:7299307

Analog i/o with digital signal processor array

No:6539534

Apparatus and method for automatically generating circuit designs that meet user output requirements

No:6490714

Apparatus and method for in-system programming of a field programmable logic device using device-specific characterization data

No:6134707

Apparatus and method for in-system programming of integrated circuits containing programmable elements

No:5796623

Apparatus and method for performing computations with electrically reconfigurable logic devices

No:6625796

Apparatus and method for programming a set of programmable logic devices in parallel

No:7028270

Apparatus and method for reset distribution

No:7343569

Apparatus and method for reset distribution

No:5745372

Apparatus and method for routing signals in a field programmable gate array integrated circuit

No:7415690

Apparatus and methods for multi-gate silicon-on-insulator transistors

No:5109353

Apparatus for emulation of electronic hardware system

No:7451426

Application specific configurable logic ip

No:5978943

Application specified integrated circuit with user programmable logic circuit

No:7243329

Application-specific integrated circuit equivalents of programmable logic and associated methods

No:7219314

Application-specific methods for testing molectronic or nanoscale devices

No:7007250

Application-specific methods useful for testing look up tables in programmable logic devices

No:6891395

Application-specific testing methods for programmable logic devices

No:6817006

Application-specific testing methods for programmable logic devices

No:7017136

Architecture and interconnect scheme for programmable logic circuits

No:7409664

Architecture and interconnect scheme for programmable logic circuits

No:5457410

Architecture and interconnect scheme for programmable logic circuits

No:6526557

Architecture and method for partially reconfiguring an fpga

No:7058906

Architecture for a sea of platforms

No:7024653

Architecture for efficient implementation of serial data communication functions on a programmable logic device (pld)

No:5587921

Array of configurable logic blocks each including a look up table having inputs coupled to a first multiplexer and having outputs coupled to a second multiplexer

No:5586044

Array of configurable logic blocks including cascadable lookup tables

No:7346876

Asic having dense mask-programmable portion and related system development method

No:7251805

Asics having more features than generally usable at one time and methods of use

No:7426708

Asics having programmable bypass of design faults

No:7424697

Assigning inputs of look-up tables to improve a design implementation in a programmable logic device

No:7299439

Assignment of i/o objects with multiple i/o standards to virtual i/o banks using integer linear programming

No:7480884

Assignment of select i/o objects to banks with mixed capacities using integer linear programming

No:7426709

Auto-generation and placement of arbitration logic in a multi-master multi-slave embedded system

No:6510545

Automated shielding algorithm for dynamic circuits

No:7415682

Automatic adjustment of optimization effort in configuring programmable devices

No:7415689

Automatic configuration of a microprocessor influenced by an input program

No:7305649

Automatic generation of a streaming processor circuit

No:6631510

Automatic generation of programmable logic device architectures

No:7409669

Automatic test configuration generation facilitating repair of programmable circuits

No:7310794

Backward compatible plds

No:7241635

Binning for semi-custom asics

No:6898777

Block level routing architecture in a field programmable gate array

No:7360195

Block level routing architecture in a field programmable gate array